1. Field of the Invention
The present invention relates to a semiconductor substrate and a method of fabricating a semiconductor device and, more particularly, to a semiconductor substrate and a method of fabricating a semiconductor device which prevent particles of dust from being produced at an edge of the substrate.
2. Description of the Background Art
An SOI (silicon on insulator) device including a semiconductor element formed on an SOI substrate is superior to a bulk device in its decreased junction capacitance and improved device isolation breakdown voltage, but has inherent problems to be described below.
FIG. 40 is a sectional view of an SOI substrate 10. The SOI substrate 10 has a triple layer structure comprising a silicon substrate 1, a buried oxide film 2 formed in an upper major surface of the silicon substrate 1, and a single crystalline silicon layer (referred to hereinafter as an SOI layer) 3 formed on the buried oxide film 2. A polysilicon layer 4 is formed on edges and a lower major surface of the single crystalline silicon substrate 1. The polysilicon layer 4 is provided to getter contaminants such as heavy metals provided during wafer fabrication steps and a transistor wafer process. A structure having such a polysilicon layer is known as a poly-back-coat structure (PBC structure).
Methods of fabricating the SOI substrate include a SIMOX (separation by implanted oxygen) method and a bonding method. The SOI substrate fabricated by the SIMOX method (SIMOX substrate) is employed as an example in the following description.
In the SIMOX method, oxygen ions are implanted into a single crystalline silicon substrate at a dose of, for example, 0.4.times.10.sup.18 /cm.sup.2 to 3.times.10.sup.18 /cm.sup.2, and thereafter the silicon substrate is annealed at a temperature of about 1350.degree. C. to provide the SOI structure.
FIG. 41 is a partial detailed view of an edge of the SOI substrate 10. For purposes of explanation, the semiconductor substrate is divided into four sections: an upper major surface (on which semiconductor elements are to be formed), a central section of the upper major surface (including active regions), an edge section including a section surrounding the central section and side surfaces, and a lower major surface.
FIG. 41 shows an area X in detail in which the buried oxide film 2 and the SOI layer 3 meet the polysilicon layer 4. As illustrated in FIG. 41, since the edge section has a curved surface having a great curvature, vertically directed oxygen ions are implanted in a slanting direction into the edge section, decreasing an effective implantation energy in the edge section. The result is the reduction in the thickness of the buried oxide film 2 and the SOI layer 3 in the edge section, creating a structure wherein the SOI layer 3 is prone to exfoliate.
Additionally, the step of thinning the SOI layer 3 during the fabrication of the SOI device promotes the exfoliation of the SOI layer 3. The step of thinning the SOI layer 3 is described with reference to FIGS. 42 and 43.
The SOI layer 3 in the SOI substrate 10 has a suitable thickness as shown in FIG. 42 when the substrate is fabricated. The step of thinning the SOI layer 3 is to suitably reduce the thickness of the SOI layer 3 in accordance with the specs of a desired semiconductor device, and comprises oxidizing the SOI layer 3 and removing the resultant oxide film to adjust the thickness of the SOI layer 3.
FIG. 43 shows an oxide film 5 formed on the SOI layer 3. The thickness of the oxide film 5 is generally determined based on the thickness of the SOI layer 3 in the central section of the SOI substrate 10, that is, semiconductor element formation regions (active regions). The problems that arise herein are the reduced thickness of the SOI layer 3 in the edge section of the SOI substrate 10 as above described, and the formation of the polysilicon layer 4 in the edge section of the SOI substrate 10. An area Y shown in FIG. 42 is illustrated in more detail in FIG. 44, and an area Z shown in FIG. 43 is illustrated in more detail in FIG. 45. FIG. 46 shows the edge section after the removal of the oxide film 5.
As illustrated in FIG. 44, the polysilicon layer 4 is comprised of a multiplicity of single crystal grains GP. Because of individually different crystal orientations of the single crystal grains GP, the oxygen ions are implanted to different depths due to channeling, causing the buried oxide film 2 to be formed at varied depths.
Further, different oxidation rates of the polysilicon layer 4 depending on the crystal orientations of the single crystal grains GP result in different thicknesses of the oxide film 5 in accordance with the respective single crystal grains GP as shown in FIG. 45 after the oxidation of the polysilicon layer 4.
The reduced thickness of the SOI layer 3 in the edge section of the SOI substrate 10 might cause the oxide film 5 to be contact with the buried oxide film 2 depending on the single crystal grains GP and cause the SOI layer 3 to be completely oxidized. In such cases, part of the SOI layer 3 might be surrounded by the buried oxide film 2 and the oxide film 5. For example, an SOI layer 30 shown in FIG. 45 is surrounded by the oxide film 5 and the buried oxide film 2.
When wet etching is performed on the oxide film 5 using an etchant such as hydrofluoric acid for thinning the SOI layer 3 in the SOI substrate 10 under the above described conditions, the buried oxide film 2 as well as the oxide film 5 is etched as shown in FIG. 46. Then, the SOI layer 30 is lifted off into a particle suspended in the etchant. In some cases, the SOI layer 30 might adhere to the central section of the SOI substrate 10. The adhesion of particles to the semiconductor element formation regions causes the formation failures of semiconductor elements and, accordingly, the decrease in fabrication yield.
As above described, the background art semiconductor substrate, particularly the SOI substrate, has the drawback that the SOI layer in the edge section of the substrate exfoliates into particles to cause the decrease in fabrication yield. The production of the particles is also a problem for semiconductor substrates other than the SOI substrate.